1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuit (IC) manufacturing, and more specifically, to a method of stacking wafers with anisotropic conductive adhesive and a stacked-wafer structure having anisotropic conductive adhesive.
2. Discussion of Related Art
In 1965, Gordon Moore first observed that the number of devices per area on a chip appeared to double approximately every 18 months. Ever since then, the semiconductor industry has managed to introduce new designs and processes on schedule to deliver the improvement in device density projected by Moore's Law. In particular, major enhancements in photolithography have reduced the minimum dimension that can be successfully patterned in a feature on the chip. At the same time, significant improvements in doping, deposition, and etch have enhanced the precision that concentration, depth, and thickness can be controlled across the chip.
As device dimensions approach atomic dimensions, the fundamental limitations of physics play increasingly larger roles in determining the performance and reliability of the devices on the chip. In the past, scaling of the chip has been accomplished by shrinking the dimensions of each device within the chip as well as shrinking the dimensions of the interconnections among the devices.
However, it is becoming increasingly important to balance the scaling within the chip with the scaling of the electrical connections between various chips that may be fabricated on various substrates.